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So, let's start thinking about how to go
build

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a memory coherence protocol.
So, as a little bit of warm up.

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For a memory coherence protocol we'll
actually see that this problem.

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Exists beyond multiprocessor systems.

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So a lot of the motivation for these ideas
in

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[UNKNOWN]

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coherence protocols actually pre-date even
having multiprocessors.

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And how is that possible?

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Well the same problem ends up in.

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I/O.
So let's say you have parallel I/O.

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So let's take a look at this picture here.

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We have one processor, a uni-processor
system and we have main memory here.

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And we have a cache.
And then over here we

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have a disk with a DMA engine.
So a direct memory access engine.

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So this is an autonomous,

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controller here which can move data from
the disc to main memory and

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vice versa.
So how does, how does this come up with,

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something like parelell, what problems can
come up with something like parallel i/o?

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Well, let's say that the disk here wants
to

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transfer a page from the disk to physical
memory, or to main

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memory, while the processor is running.

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Well, you program up the DMA controller,
it says go.

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Well, it's going to start copying data
here from the disk out to main memory.

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Well, because we have not done anything on
this bus, we just use it as a way to

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communicate, the cache here might have the
same addresses that are being written to.

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And, now they're going to have stale
values.

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So they'll never actually pick up the
value from

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That just got DMAed, or just got moved
from the disk to physical memory.

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Likewise so that's disk to memory.
You might get scale data in the cache.

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Likewise you could have memory trying to
go to disk here.

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So, let's say you start to have a DMA
transfer from main memory to disk,

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but you might have data in the cache here.
Let's say it's a write back cache.

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Well, this transfer could get started, but
it could miss.

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Updated data here in the cache.

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So we can try to start doing copies, but
because we said the DMA

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agent just copies directly from physical
memory

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to disk, it'll just miss those updates.

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So there's no good way for the processor
to go and write data to the disk, and,

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and this is something you fundamentally
want to do, so there's a couple

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solutions to this.

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And this is sort of brainteaser to get you
thinking about this.

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But what do you need to do to guarantee
some way of having the disk here.

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For instance we will see the data that's
in the cache.

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Well How do you go about doing this?

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You need some way to either invalidate the
cache and send these to main

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memory and have the disk pull out the
updated or most up to date copies.

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And this is a sort of similar notion as
what we have to do, back in this example

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here.
We need some

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way to

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either get

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the most

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up to date

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value or, or

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invalidate or

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pick data

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out of

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apical

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cache.In

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other wards

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to allow

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new windows

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to see

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updates.