1 00:00:03,620 --> 00:00:09,645 I'll just skip way prediction cuz I don't think it's that important. 2 00:00:09,880 --> 00:00:15,906 I did want to say one or two words about critical word first and early restart. 3 00:00:15,906 --> 00:00:21,932 So, critical word first, basic idea here is that you can express to the memory 4 00:00:21,932 --> 00:00:25,362 system which word is the most important word. 5 00:00:25,362 --> 00:00:31,430 And usually RAM arrays the buses are oriented in a way that they'll actually 6 00:00:31,430 --> 00:00:38,029 allow it takes multiple pumps or multiple cycles to transmit the data across the 7 00:00:38,029 --> 00:00:41,519 bus. And usually, these arrays don't care at 8 00:00:41,519 --> 00:00:47,966 least, like main memory, like, like, D-RAM arrays, big, big thing on your, on your 9 00:00:47,966 --> 00:00:51,380 chassis or on your system server motherboard. 10 00:00:51,416 --> 00:00:56,526 Cough They don't really care if they return the data in this order, zero, one, 11 00:00:56,526 --> 00:01:01,340 two, three, four, five, six, seven and eight, Probably seven, Sorry. 12 00:01:01,340 --> 00:01:07,550 Or, if you return it in a different order because they just wanna use the bus as 13 00:01:07,550 --> 00:01:11,620 much as possible. So, what you can do is you can say, COUGH 14 00:01:12,220 --> 00:01:16,027 address three is the most important one, please return that first. 15 00:01:16,027 --> 00:01:20,773 So, what can happen is it will return the data and right here, address three comes 16 00:01:20,773 --> 00:01:25,049 back, and it comes back first always, being cuz that's the address that we're 17 00:01:25,049 --> 00:01:29,435 trying to access for this loadness. And can start the CPU executing again 18 00:01:29,435 --> 00:01:33,062 while the rest of the cache line is filling into the cache. 19 00:01:33,062 --> 00:01:37,979 So you've basically done a little bit of overlapping but this doesn't help that 20 00:01:37,979 --> 00:01:40,560 much. Because usually, you know, there's not 21 00:01:40,560 --> 00:01:45,085 that many a cache line is not that long so it might help you a little bit. 22 00:01:45,085 --> 00:01:49,311 So, you know, if it takes eight cycles to fill the cache, you might save seven 23 00:01:49,311 --> 00:01:53,815 cycles if you were going to the last, if you were trying to load the last word in 24 00:01:53,815 --> 00:01:56,929 the cache line. But if you were trying to, let's say, load 25 00:01:56,929 --> 00:02:00,377 the second line in the cache line, it only saves you one cycle. 26 00:02:00,377 --> 00:02:05,940 And there is some complexity in actually building critical word first systems. 27 00:02:06,055 --> 00:02:11,178 Cough Early restart is another way to do this which little less hardware. 28 00:02:11,178 --> 00:02:16,512 Instead of having the memory system rotate the memory that returns back to you, it 29 00:02:16,512 --> 00:02:19,700 still returns the memory in the canonical order. 30 00:02:19,960 --> 00:02:24,617 But, we just wait until let's say, we want to dress three here, it comes back and we 31 00:02:24,617 --> 00:02:27,628 restart there. So you can see there's a little bit of 32 00:02:27,628 --> 00:02:32,424 time here which we could overlay it block the fill in with executing in the CPU 33 00:02:32,424 --> 00:02:34,754 again. In the canonical case, if we don't have 34 00:02:34,754 --> 00:02:39,303 early restart, what's going to happen is we have to wait for the entire cache line 35 00:02:39,303 --> 00:02:43,685 to come in and then we can restart, so we lose, we lose these, these cycles there. 36 00:02:43,685 --> 00:02:47,458 We don't get that overlap. Okay. Let's stop here for today and I'm 37 00:02:47,458 --> 00:02:52,006 going to remove the, the weight prediction stuff from the material we talked about 38 00:02:52,006 --> 00:02:53,560 cuz it's not that important.