1 00:00:03,041 --> 00:00:10,489 Okay, so today we're gonna pick up where we left off and continue talking about out 2 00:00:10,489 --> 00:00:17,029 of order processors? And things are gonna start to get a little 3 00:00:17,029 --> 00:00:21,074 complicated, but that's good. We don't want to build, well, we want to 4 00:00:21,074 --> 00:00:27,005 try to build simple things, but we also want to build high performance things, so. 5 00:00:29,028 --> 00:00:34,049 Let's start talking about some more complex, out of order processors than we 6 00:00:34,049 --> 00:00:38,951 talked, talked about last time. So last time we talked about In order, in 7 00:00:38,951 --> 00:00:44,012 order, in order processors, and we introduced a scoreboard, and then we 8 00:00:44,012 --> 00:00:49,060 started to talk some about in order, in order, where the front of the machine is 9 00:00:49,060 --> 00:00:55,007 in order and the issue is in order while the write back and the commit are out of 10 00:00:55,007 --> 00:00:58,014 order. It also uses scoreboard, and today we're 11 00:00:58,014 --> 00:01:02,005 going to start talking about things that even have higher performance. 12 00:01:02,020 --> 00:01:06,025 And this is sort of, roughly put in sort of order of performance and sort of what 13 00:01:06,025 --> 00:01:10,001 people build if they actually want high performance in their computer systems. 14 00:01:10,001 --> 00:01:13,092 And we're gonna start talking about in order on the front end, out of order in 15 00:01:13,092 --> 00:01:17,073 the back end, and we're gonna have to introduce things like re-order buffer, and 16 00:01:17,073 --> 00:01:21,062 a store buffer. Then we're gonna talk about a machine 17 00:01:21,062 --> 00:01:26,026 which has in order front end and all the back stages are out, out of order. 18 00:01:26,026 --> 00:01:31,046 Which may not make a whole lot of sense, because out of order commit starts to look 19 00:01:31,046 --> 00:01:34,085 a little odd. Likewise that's the, the case for this 20 00:01:34,085 --> 00:01:37,094 processor. And, and, so why does out of order commit 21 00:01:37,094 --> 00:01:41,029 look a little odd? Well, when you start to have out of order 22 00:01:41,029 --> 00:01:45,095 commits it's very possible that you could if want to have a precise exceptions 23 00:01:46,012 --> 00:01:48,092 point. It, depending on how you sort of implement 24 00:01:48,092 --> 00:01:52,066 that processor, and depending on where you put the commit points. 25 00:01:52,066 --> 00:01:57,040 If you put the commit points let's say at the end of the pipe it's very possible 26 00:01:57,040 --> 00:02:02,020 you'll commit results to your register file, or your architecture register file 27 00:02:02,020 --> 00:02:04,095 before you know that those results are good. 28 00:02:04,095 --> 00:02:09,021 So you've basically just executed instructions and committed information 29 00:02:09,021 --> 00:02:13,049 that's not correct in program work. And we'll show you some of that today. 30 00:02:13,049 --> 00:02:19,000 Then finally we're gonna talk about sort of a, the highest performance thing here, 31 00:02:19,000 --> 00:02:23,096 which is a, in order, fetch. Out of order issue, out of order execute, 32 00:02:23,096 --> 00:02:27,003 and right back, and then finally an in order commit. 33 00:02:27,003 --> 00:02:31,073 So this, you can have precise exceptions, have a commit point at the end of the 34 00:02:31,073 --> 00:02:34,062 pipe. And for this we need to introduce an issue 35 00:02:34,062 --> 00:02:39,008 queue, which is where the instructions sort of live for a while as they're 36 00:02:39,008 --> 00:02:43,030 getting ready to go issue, and this allows us to do out of order issue. 37 00:02:44,003 --> 00:02:46,055 Just to recall back our motivating examples. 38 00:02:46,055 --> 00:02:50,085 Example, we're gonna be using this example throughout today's lecture again. 39 00:02:51,031 --> 00:02:55,027 Two different instruction code sequences not dependent on each other. 40 00:02:55,027 --> 00:03:00,021 You should be able to execute these things in parallel if you had enough parallels on 41 00:03:00,021 --> 00:03:02,084 your machine. And we talked about this already. 42 00:03:02,084 --> 00:03:06,058 So I'm gonna skip past the, in order, in order, in order machine. 43 00:03:07,034 --> 00:03:14,411 And get to, in order, in order, front end an issue, and out of order right back in